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  revisions ltr description date (yr-mo-da) approved a updated document. added three devic e types 04, 05, and 06. added s package. added two vendors. editorial changes throughout. 91-08-23 m. a. frye b update boilerplate. add device type 07 for vendor 66675. editorial changes throughout. 94-07-12 m. a. frye c add device types 08 through 10. update boilerplate. editorial changes throughout. 95-05-12 m. a. frye d add device types 11 through 14. update boilerplate. ksr 98-12-04 raymond monnin e lower t pd and t co minimum value by 1 ns for devices 01, 02, and 03. ksr 99-08-04 raymond monnin f boilerplate update, part of 5 year review. ksr 07-04-24 robert m. heber the original first page has been replaced rev sheet rev sheet rev status rev f f f f f f f f f f f f f of sheets sheet 1 2 3 4 5 6 7 8 9 10 11 12 13 pmic n/a prepared by kenneth s. rice defense supply center columbus standard microcircuit drawing checked by wm j. johnson columbus, ohio 43218-3990 http://www.d scc.dla.mil this drawing is available for use by all departments approved by michael a. frye and agencies of the department of defense drawing approval date 89-12-18 microcircuit, memory, digital, ee programmable array logic, monolithic silicon amsc n/a revision level f size a cage code 67268 5962-89839 sheet 1 of 13 dscc form 2233 apr 97 5962-e314-07 .
standard microcircuit drawing size a 5962-89839 defense supply center columbus columbus, ohio 43218-3990 revision level f sheet 2 dscc form 2234 apr 97 1. scope 1.1 scope . this drawing describes device requirements for mil- std-883 compliant, non-jan class level b microcircuits in accordance with mil-prf-38535, appendix a. 1.2 part or identifying number (pin) . the complete pin is as shown in the following example: 5962-89839 01 r a drawing number device type (see 1.2.1) case outline (see 1.2.2) lead finish (see 1.2.3) 1.2.1 device type(s) . the device type(s) identify the circuit function as follows: device type generic number circuit function access time current 01 16v8 16-input, 8-output, eecmos, architecturally 30 130 generic, programmable and-or array 02 16v8 16-input, 8-output, eecmos, architecturally 20 130 generic, programmable and-or array 03 16v8 16-input, 8-output, eecmos, architecturally 15 130 generic, programmable and-or array 04, 11 16v8 16-input, 8-output, eecmos, architecturally 10 130 generic, programmable and-or array 05 16v8 16-input, 8-output, eecmos, architecturally 25 65 generic, programmable and-or array 06 16v8 16-input, 8-output, eecmos, architecturally 20 65 generic, programmable and-or array 07 16v8 16-input, 8-output, eecmo s, architecturally 7.5 130 generic, programmable and-or array 08, 12 16v8 16-input, 8-output, eec mos, architecturally 25 65 generic, programmable and-or array 09, 13 16v8 16-input, 8-output, eecmos, architecturally 15 130 generic, programmable and-or array 10, 14 16v8 16-input, 8-output, eec mos, architecturally 15 65 generic, programmable and-or array 1.2.2 case outline(s) . the case outline(s) are as des ignated in mil-std-1835 and as follows: outline letter descriptive designator terminals package style r gdip1-t20 or cdip2-t20 20 dual-in-line s gdfp2-f20 or cdfp3-f20 20 flat package 2 cqcc1-n20 20 square chip carrier package 1.2.3 lead finish . the lead finish is as spec ified in mil-prf-38535, appendix a.
standard microcircuit drawing size a 5962-89839 defense supply center columbus columbus, ohio 43218-3990 revision level f sheet 3 dscc form 2234 apr 97 1.3 absolute maximum ratings . supply voltage range ................................................................................... -0.5 v dc to +7.0 v dc input voltage range applied .......................................................................... -2.5 v dc to v cc + 1.0 v dc 1 / off-state output voltage range app lied ......................................................... -2 .5 v dc to v cc + 1.0 v dc 1 / storage temperatur e range .......................................................................... -65 c to +150 c maximum power dissipation (p d ) 2 /............................................................. 1.5 w lead temperature (solderi ng, 10 seconds )................................................... +260 c thermal resistance, junction-to-case ( jc ).................................................. see mil-std-1835 junction temperature (t j )............................................................................. +175 c data retent ion .............................................................................................. 10 y ears (minimum) endurance .................................................................................................... 100 erase/write c ycles (minimum) 1.4 recommended operating conditions . supply voltage range (v cc )......................................................................... 4.5 v dc to 5.5 v dc high level input voltage range (v ih )............................................................. 2.0 v dc to v cc + 1.0 v dc low level input voltage range (v il ) .............................................................. v ss -0.5 v dc to +0.8 v dc high level output current (i oh ) .................................................................... -2.0 ma maximum low level output current (i ol ) ...................................................................... 12 ma maximum case operating temperature range (t c ) ...................................................... -55 c to +125 c 2. applicable documents 2.1 government specif ication, standards, and handbooks . the following specificati on, standards, and handbooks form a part of this drawing to the extent specified herein. unless otherwise specified, the issues of thes e documents are those cited in t he solicitation or contract. department of defense specification mil-prf-38535 - integrated circuits, manufacturing, general specification for. department of defense standards mil-std-883 - test me thod standard microcircuits. mil-std-1835 - interface standard electronic component case outlines. department of defense handbooks mil-hdbk-103 - list of st andard microcircuit drawings. mil-hdbk-780 - standard microcircuit drawings. (copies of these document s are available online at http://assist.daps.dla.mil/quicksearch/ or http://assist.daps.dla.mil or from the standardization document order desk, 700 robbins avenue, building 4d, philadelphia, pa 19111-5094.) 2.2 order of precedence . in the event of a conflict betw een the text of this drawing and the references cited herein, the text of this drawing takes precedence. nothing in this docum ent, however, supersedes applicable laws and regulations unless a specific exempti on has been obtained. 1 minimum input voltage is -0.5 v dc which may undershoot to -2.5 v dc for pulses less than 20 ns. 2 / must withstand the added p d due to short circuit test (e.g., i sc ).
standard microcircuit drawing size a 5962-89839 defense supply center columbus columbus, ohio 43218-3990 revision level f sheet 4 dscc form 2234 apr 97 table i. electrical performance characteristics . test symbol conditions device group a limits unit -55 c t c +125 c type sub- v ss = 0 v, 4.5 v v cc 5.5 v groups min max unless otherwise specified input leakage current i lx 0.0 v v in v cc 01-03, 1,2,3 -10 10 a 05,06 04, -100 10 07-14 bidirectional pin i i/o/q 0.0 v v i/o/q v cc 01-03, 1,2,3 -10 10 a leakage current 05,06 04, -100 10 07-14 output low voltage v ol v cc = 4.5 v, i ol = 12 ma, all 1,2,3 0.5 v v in = v ih or v il output high voltage v oh v cc = 4.5 v, i oh = -2.0 ma, all 1,2,3 2.4 v v in = v ih or v il input low voltage 1 / v il all 1,2,3 v ss 0.8 v -0.5 input high voltage 1 / v ih all 1,2,3 2.0 v cc v +1.0 01-04, operating power i cc v il = 0.5 v, v ih = 3.0 v, 07,09, 1,2,3 130 ma supply current 2 / f tog = 25 mhz 11,13 05,06, 08,10, 65 12,14 output short circuit i os v cc = 5.0 v, v out = 0.5 v, all 1 -30 -150 ma current 3 / t a = +25 c, see 4.3.1d input capacitance c in v cc = 5.0 v, v i = 2.0 v, all 4 10 pf f = 1.0 mhz, t a = +25 c, see 4.3.1c bidirectional pin c i/o/q v cc = 5.0 v, v i/o/q = 2.0 v, all 4 10 pf capacitance f = 1.0 mhz, t a = +25 c, see 4.3.1c functional tests see 4.3.1e all 7,8a,8b see footnotes at end of table.
standard microcircuit drawing size a 5962-89839 defense supply center columbus columbus, ohio 43218-3990 revision level f sheet 5 dscc form 2234 apr 97 table i. electrical performance characteristics - continued. conditions test symbol -55 c t c +125 c device group a limits unit v ss = 0 v, 4.5 v v cc 5.5 v type sub- unless otherwise specified groups min max input or feedback to t pd v cc = 4.5 v, see figures 01 9,10,11 2.0 30 ns nonregistered output 3 and 4 4 / 02 2.0 20 06 3.0 20 03 2.0 15 09,10, 13,14 3.0 15 04 2.0 10 05,08, 3.0 25 12 07 1.0 7.5 11 3.0 10.0 clock to output delay t co 01 9,10,11 1.0 20 ns 5 / 02 1.0 15 06 2.0 15 03 1.0 12 09,10,12 2.0 12 04 1.0 7.0 13,14 2.0 10.0 05,08 2.0 15 07 1.0 6 11 2.0 7.0 input to output enable t ea1 01 9,10,11 30 ns 02,06 20 03,09, 15 10,13,14 04,11 10 05,08, 25 12 07 9.0 input to output register t ea2 01,08 9,10,11 25 ns enable 5 / 02,06 18 03,09, 15 10,13,14 04,11 10 05,12 20 07 7.0 see footnotes at end of table.
standard microcircuit drawing size a 5962-89839 defense supply center columbus columbus, ohio 43218-3990 revision level f sheet 6 dscc form 2234 apr 97 table i. electrical performance characteristics - continued. test symbol conditions device group a limits unit -55 c t c +125 c type sub- v ss = 0 v, 4.5 v v cc 5.5 v groups min max unless otherwise specified input to output disable 6 / t er1 v cc = 4.5 v, see figures 01 9,10,11 30 ns 3 and 4 4 / 02,06 20 03,09, 15 10,13,14 04,11 10 05,08, 25 12 07 7.0 input to output register t er2 01,08 9,10,11 25 ns disable 5 / 6 / 02,06 18 03,09, 15 10,13,14 04,11 10 05,12 20 07 7.0 clock frequency without f clk1 01 9,10,11 0.0 33.3 mhz feedback 5 / 7 / 12 0.0 37.0 02,06 0.0 41.6 13,14 0.0 45.5 03,09, 0.0 50.0 10 04 0.0 62.5 11 0.0 58.0 05,08 0.0 33.3 07 0.0 100.0 clock frequency with f clk2 01 9,10,11 0.0 22.2 mhz feedback 5 / 02,06 0.0 33.3 12 0.0 40.0 03,09, 0.0 41.6 10 04 0.0 58.5 13,14 0.0 50.0 05,08 0.0 28.5 11 0.0 62.5 07 0.0 76.9 see footnotes at end of table.
standard microcircuit drawing size a 5962-89839 defense supply center columbus columbus, ohio 43218-3990 revision level f sheet 7 dscc form 2234 apr 97 table i. electrical performance characteristics - continued. test symbol conditions device group a limits unit -55 c t c +125 c type sub- v ss = 0 v, 4.5 v v cc 5.5 v groups min max unless otherwise specified input or feedback setup t s v cc = 4.5 v, see figures 01 9,10,11 25 ns time, before rising 3 and 4 4 / 02,06, 15 clock 5 / 12 03,09, 12 10,13,14 04,11 10 05,08 20 07 7.0 input or feedback hold time t h 01 - 10 9,10,11 0 ns after rising clock 5 / 11 - 14 0.5 clock pulse width, high 5 / t pwh 01 9,10,11 15 ns 02,06, 12 12 03,09, 10 10 04,13,14 8.0 05,08 15 07 5.0 11 6.0 clock pulse width, low 5 / t pwl 01 9,10,11 15 ns 02,06, 12 12 03,09, 10 10 04,13, 8.0 14 05,08 15 07 5.0 11 6.0 1 / these are absolute values with respect to device ground, and all overshoots due to system or tester noise are included. 2 / this parameter may be tested at a fr equency other than 25mhz, but shall be guaranteed to the s pecified limits at 25mhz. 3 / not more than one output at a time shoul d be shorted. short circuit test durat ion should not exceed 1 second (see 4.3.1d). 4 / ac tests are performed with input rise and fall times (10 percent to 90 percent) of 3.0 ns, timi ng reference levels of 1.5 v, input pulse levels of 0 to 3.0 v and the out put load of figure 3. input pulse levels are absolute values with respect to devic e ground, and all overshoots due to system or tester noise are included. 5 / test applies only to registered outputs. 6 / transition is measured at steady-state high level -500 mv or steady-state low le vel +500 mv on the out put from the 1.5 v level on the input. 7 / tested initially and after any design or process changes that affect that parameter, and theref ore shall be guaranteed to the limits specified in table i.
standard microcircuit drawing size a 5962-89839 defense supply center columbus columbus, ohio 43218-3990 revision level f sheet 8 dscc form 2234 apr 97 device types all case outlines r, s, 2 terminal number terminal symbol 1 i/clk 2 i 3 i 4 i 5 i 6 i 7 i 8 i 9 i 10 gnd 11 i/ oe 12 i/o/q 13 i/o/q 14 i/o/q 15 i/o/q 16 i/o/q 17 i/o/q 18 i/o/q 19 i/o/q 20 v cc figure 1. terminal connections . inputs output i/clk i/ oe i i i i i i i i i/o/q i/o/q i/o/q i/o/q i/o/q i/o/q i/o/q i/o/q x x x x x x x x x x h h h h h h h h x = don't care state h = logic high figure 2. truth tables (unprogrammed) .
standard microcircuit drawing size a 5962-89839 defense supply center columbus columbus, ohio 43218-3990 revision level f sheet 9 dscc form 2234 apr 97 test r 1 c l (minimum) t pd , t co , f clk , f clk2 390 ? 50 pf t ea1 , t ea2 active high = infinity active low = 390 ? 50 pf t er1 , t er2 active high = infinity active low = 390 ? 5.0 pf note: c l = load capacitance and includes jig and probe capacitance. figure 3. output load circuit .
standard microcircuit drawing size a 5962-89839 defense supply center columbus columbus, ohio 43218-3990 revision level f sheet 10 dscc form 2234 apr 97 figure 4. switching waveforms .
standard microcircuit drawing size a 5962-89839 defense supply center columbus columbus, ohio 43218-3990 revision level f sheet 11 dscc form 2234 apr 97 table ii. electrical test requirements . mil-std-883 test requirements subgroups (per method 5005, table i) interim electrical parameters (method 5004) --- final electrical test parameters (method 5004) 1*, 2, 3, 7*, 8a, 8b 9, 10,11 group a test requirements (method 5005) 1,2,3,4**,7,8a,8b, 9, 10,11 groups c and d end-point electrical parameters (method 5005) 2, 3, 7, 8a, 8b * indicates pda applies to subgroups 1 and 7. ** see 4.3.1c. 3. requirements 3.1 item requirements . the individual item requirements shall be in accordance with mil-prf-38535, appendix a for non- jan class level b devices and as specified herein. product built to this drawing t hat is produced by a q ualified manufacturer listing (qml) certified and qualif ied manufacturer or a manufacturer who has been granted transitional ce rtification to mil- prf-38535 may be processed as qml product in accordance wi th the manufacturers approv ed program plan and qualifying activity approval in accordance with mil-prf-38535. this qml flow as documented in the quality management (qm) plan may make modifications to the requirements herein. these modifi cations shall not affect form, fit, or function of the device. these modifications shall not affect the pi n as described herein. a "q" or "qml" ce rtification mark in accordance with mil- prf-38535 is required to identify w hen the qml flow option is used. 3.2 design, construction, and physical dimensions . the design, construction, and physica l dimensions shall be as specified in mil-prf-38535, appendix a and herein. 3.2.1 case outlines . the case outlines shall be in accordance with 1.2.4 herein. 3.2.2 terminal connections . the terminal connections shall be as specified on figure 1. 3.2.3 truth table (unprogrammed devices) . the truth table for unprogrammed devic es shall be as specified on figure 2. 3.2.4 programmed devices . the requirements for supplying programmed devices are not a part of this drawing. 3.3 electrical performance characteristics . unless otherwise specified herein, the electrical performance characteristics are as specified in table i and shall apply over the full case operati ng temperature range. 3.4 electrical test requirements . the electrical test requirements shall be the subgroups specified in table ii. the electrical tests for each subgroup are described in table i. 3.5 marking . marking shall be in accordance with mil-prf-38535, appendix a. the part shall be marked with the pin listed in 1.2 herein. in addition, the m anufacturer's pin may also be marked. for packages where marki ng of the entire smd pin number is not feasible due to space lim itations, the manufacturer has the option of not marki ng the "5962-" on the device. 3.5.1 certificat ion/compliance mark . a compliance indicator ?c? shall be marked on all non-jan devices built in compliance to mil-prf-38535, appendix a. the compliance indicator ?c? sha ll be replaced with a "q" or "q ml" certification mark in accordance with mil-prf-38535 to identif y when the qml flow option is used. 3.6 certificate of compliance . a certificate of compliance shall be required from a manufactu rer in order to be listed as an approved source of supply in mil-hdbk-103 (s ee 6.6 herein). the certificate of co mpliance submitted to dscc-va prior to listing as an approved source of supply shall affirm that t he manufacturer's product meets the requirements of mil-prf- 38535, appendix a and the r equirements herein.
standard microcircuit drawing size a 5962-89839 defense supply center columbus columbus, ohio 43218-3990 revision level f sheet 12 dscc form 2234 apr 97 3.7 certificat e of conformance . a certificate of conformance as requi red in mil-prf-38535, appendix a shall be provided with each lot of microcircuits delivered to this drawing. 3.8 notification of change . notification of change to dscc-va shall be requi red for any change that affects this drawing. 3.9 verification and review . dscc, dscc's agent, and the acquiring activity re tain the option to review the manufacturer's facility and applicable required doc umentation. offshore documentat ion shall be made available ons hore at the option of the reviewer. 3.10 endurance a reprogrammability test shall be completed as part of the vendor's reliability process. this reprogrammability test shall be done for init ial characterization and after any design or process changes which may affect the reprogrammability of the devic e. the methods and procedures may be vendor specific, but shall guarantee the number of program/erase endurance cycles listed in section 1.3 herein. the vendor's pr ocedure shall be under document control and shall be made available upon request. 3.11 retention a data retention stress test shall be completed as part of the vendor's reli ability monitors. this test shall be done for initial characterization and after any design or proce ss changes which may affect data retention. the methods and procedures may be vendor specific, but sha ll guarantee the number of year s listed in section 1.3 her ein over the full military temperature range. the vendor's proc edure shall be kept under doc ument control and shall be made available upon request of the acquiring or preparing acti vity, along with the test data. 4. verification 4.1 sampling and inspection . sampling and inspection procedures shall be in accordance with mil-prf-38535, appendix a. 4.2 screening . screening shall be in accordance with method 5004 of mil-std-883, and shall be conducted on all devices prior to quality conformance inspection. the following additional criteria shall apply: a. burn-in test, method 1015 of mil-std-883. (1) test condition d. the test circuit shall be maintai ned by the manufacturer under doc ument revision level control and shall be made available to the preparing or acquiring ac tivity upon request. the test circuit shall specify the inputs, outputs, biases, and pow er dissipation, as applicable, in accordanc e with the intent s pecified in method 1015 of mil-std-883. (2) t a = +125 c, minimum. (3) devices shall be burned-in containing a pattern that a ssures all inputs and i/o's are dynamically switched. this pattern must have all cells programmed in a high or low state (not neutralized). (4) the burn-in pattern shall be read before and after burn-in . devices having any logic array bits not in the proper state shall constitute a device failure and s hall be added as failures for pda calculation. b. interim and final electrical test parameters shall be as s pecified in table ii herein, exc ept interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. 4.3 quality conf ormance inspection . quality conformance inspection shall be in accordance with method 5005 of mil-std- 883 including groups a, b, c, and d inspections. the following additional criteria shall apply. 4.3.1 group a inspection . a. tests shall be as spec ified in table ii herein. b. subgroups 5 and 6 in table i, method 5005 of mil-std-883 s hall be omitted. c. subgroup 4 (c in and c i/o/q measurements) shall be measur ed only for the initial test and after process or design changes which may affect capacitance. sample size is fi fteen devices with no failures and all input and output terminals tested.
standard microcircuit drawing size a 5962-89839 defense supply center columbus columbus, ohio 43218-3990 revision level f sheet 13 dscc form 2234 apr 97 d. i os measurements in subgroup 1 shall be m easured only for the initial test and a fter process or design changes which may affect i os . sample size is 15 devices with no failures, and all output terminals tested. e. subgroups 7 and 8 shall include ve rification of the truth table. 4.3.2 groups c and d inspections . a. end-point electrical parameters shall be as spec ified in table ii herein. b. steady-state life test condi tions, method 1005 of mil-std-883. (1) test condition d. the test circuit shall be maintai ned by the manufacturer under doc ument revision level control and shall be made available to the preparing activity upon request. the test circuit shall specify the inputs, outputs, biases, and power dissi pation, as applicable, in accordance with the intent specif ied in method 1005 of mil-std-883. (2) ta = +125 c, minimum. (3) test duration: 1,000 hour s, except as permitted by method 1005 of mil-std-883. (4) all devices shall be programmed with a pattern that assures all inputs and i/o's are dynamically switched. 4.4 programming procedures . the programming procedures shall be as spec ified by the device m anufacturer and shall be made available to the user on request. 4.5 erasing procedures . the erasing procedures shall be as specif ied by the device manuf acturer and shall be made available to the user on request. 5. packaging 5.1 packaging requirements . the requirements for packaging shall be in accordance with mil-prf-38535, appendix a. 6. notes 6.1 intended use . microcircuits conforming to this drawing are int ended for use for government microcircuit applications (original equipment), design applic ations, and logistics purposes. 6.2 replaceability . microcircuits covered by this drawing will repl ace the same generic device covered by a contractor- prepared specificati on or drawing. 6.3 configuration control of smd's . all proposed changes to existing smd's will be coordinated with the users of record for the individual documents. this c oordination will be accomplished using dd form 1692, engineering change proposal. 6.4 record of users . military and industrial users shall inform defens e supply center columbus (dscc) when a system application requires configurati on control and the applicable smd. dscc will main tain a record of users and this list will be used for coordination and distribution of c hanges to the drawings. users of drawi ngs covering microelectronics devices (fsc 5962) should contact dscc- va, telephone (614) 692-0544. 6.5 comments . comments on this drawing should be directed to dscc-va, columbus, ohio 43218-3990, or telephone (614) 692-0547. 6.6 approved sources of supply . approved sources of supply are listed in mil-hdbk-103. the vendors listed in mil- hdbk-103 have agreed to this drawing and a certificate of complianc e (see 3.6 herein) has been submitted to and accepted by dscc-va.
standard microcircuit drawing bulletin date: 07-04-24 approved sources of supply for smd 5962-89839 are listed below for immediate acquisition information only and shall be added to mil-hdbk-103 and qml-38535 during the next re vision. mil-hdbk-103 and qml-38535 will be revised to include the addition or deletion of s ources. the vendors listed below have agr eed to this drawing and a certificate of compliance has been submitted to and a ccepted by dscc-va. this information bulletin is superseded by the next dated revision of mil-hdbk-103 and qml- 38535. dscc maintains an online databas e of all current sources of supply at http://www.d scc.dla.mil/programs/smcr/ . standard microcircuit drawing pin 1 / vendor cage number vendor similar pin 2 / 5962-8983901ra 3 / 66675 palce16v8h-25e4/bra gal16v8d-30ld/883c 5962-89839012a 3 / 3 / palce16v8h-25e4/b2a gal16v8a-30lr/883c 5962-8983902ra 3 / 3 / 66675 gal16v8l20j/883 palce16v8h-20e4/bra gal16v8d-20ld/883c 5962-89839022a 3 / 66675 palce16v8h-20e4/b2a gal16v8a-20lr/883c 5962-8983902sa 3 / gal16v8l20w/883 5962-8983903ra 3 / 3 / 66675 gal16v8l15j/883 palce16v8h-15e4/bra gal16v8d-15ld/883c 5962-89839032a 3 / 66675 palce16v8h-15e4/b2a gal16v8d-15lr/883c 5962-8983903sa 3 / gal16v8l15w/883 5962-8983904ra 66675 3 / 0c7v7 gal16v8d-10ld/883c atf16v8-10gm/883 palce16v8-10dmb 5962-89839042a 66675 3 / 0c7v7 gal16v8d-10lr/883c atf16v8b-10nm/883 palce16v8-10lmb 5962-8983905ra 3 / gal16v8a-25qd/883c 5962-89839052a 3 / gal16v8a-25qr/883c 5962-8983906ra 3 / gal16v8a-20qd/883c 5962-89839062a 3 / gal16v8a-20qr/883c 5962-8983907ra 66675 gal16v8d-7ld/883 5962-89839072a 66675 gal16v8d-7lr/883 5962-8983908ra 0c7v7 palce16v8l-25dmb 5962-89839082a 0c7v7 palce16v8l-25lmb 5962-8983909ra 0c7v7 palce16v8-15dmb 5962-89839092a 0c7v7 palce16v8-15lmb 5962-8983910ra 0c7v7 palce16v8l-15dmb 5962-89839102a 0c7v7 palce16v8l-15lmb see footnotes at end of table. page 1 of 2
standard microcircuit drawing pin 1 / vendor cage number vendor similar pin 2 / 5962-8983911ra 0c7v7 palce16v8-10dmb 5962-89839112a 0c7v7 palce16v8-10lmb 5962-8983912ra 0c7v7 palce16v8l-25dmb 5962-89839122a 0c7v7 palce16v8l-25lmb 5962-8983913ra 0c7v7 palce16v8-15dmb 5962-89839132a 0c7v7 palce16v8-15lmb 5962-8983914ra 0c7v7 palce16v8l-15dmb 5962-89839142a 0c7v7 palce16v8l-15lmb 1 / the lead finish shown for each pin representing a hermetic package is the most readily available from the manufacturer listed for that part. if the desired lead finish is not listed, contact the vendor to determine its availability. 2 / caution: do not use this number for item acquisition. items acquired to this number may not satisfy the performance requirements of this drawing. 3 / not available from an approved source. vendor cage vendor name number and address 66675 lattice semiconductor corporation 5555 ne moore court hillsboro, or 97124-6421 0c7v7 qp semiconductor 2945 oakmead village court santa clara, ca 95051 the information contained herein is di sseminated for convenience only and the government assumes no liability whats oever for any inaccuracies in the information bulletin. page 2 of 2


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